LNAs are commonly used in RF circuits when small RF signals need to be amplified for further processing. A typical application is in the front end of an RF receiver. An LNA may be the first active component in the receiver's signal path. In many applications, RF receivers must be able to function over a wide dynamic range of received signals; therefore, an LNA in the front end of such an RF receiver must be able to function over a wide dynamic range. An operating range between −100 dbm to −25 dbm is not unusual.
One design challenge occurs when an LNA is designed with sufficient RF gain to amplify the smallest signals, such as signals at −100 dbm. When the LNA then receives a large signal, such as signals at −25 dbm, the LNA or some of the downstream circuitry can become overloaded, driven into compression or saturation. One way to resolve this issue is to design an LNA with two modes of operation: a normal mode and a low-gain mode. In normal mode, the LNA operates with its maximum RF gain, which is sufficient to amplify the smallest signals. In low-gain mode, the LNA operates with reduced RF gain such that the circuitry is not overloaded. The low-gain mode is automatically selected when the LNA is receiving relatively large RF signals, such as those greater than −60 dbm.
A conventional single-ended cascode LNA 10 is shown in FIG. 1. In this example, N-Channel Metal Oxide Semiconductor Field Effect Transistors (N-MOSFETs) are used; however, other technologies, such as Junction Field Effect Transistors (JFETs) or bi-polar transistors, have also been used in LNA designs. The LNA 10 is constructed of a cascode transistor 12, which is used to increase both the output-to-input isolation and the output impedance; a gain transistor 14, which amplifies the RF input signal and sets the DC current level of the LNA 10; a load inductor 16; and a source inductor 18, which helps determine the input impedance of the LNA 10. The input impedance of the LNA 10 is determined by a combination of the gate-to-source capacitance 20 of the gain transistor 14, the source inductor 18, and the gain characteristics of the gain transistor 14. During normal operation, the DC current level of the LNA 10 is set by applying a DC voltage, called Vbias1, to the gate of the gain transistor 14 through a first bias resistor R1, and a DC voltage, called Vbias2, to the gate of the cascode transistor 12. The RF input signal to the LNA 10 is applied to the gate of the gain transistor 14. The RF output from the LNA 10 is taken from the drain of the cascode transistor 12. Normally, the gain transistor 14 functions in its saturated operating region.
A conventional differential cascode LNA 22 is shown in FIG. 2. A differential LNA 22 amplifies the difference between two input signals to create two amplified differential output signals. This LNA design essentially functions as two symmetrical, single-ended designs combined to form one differential design. One of the single-ended designs is arbitrarily designated as the positive side of the LNA 22, and the other single-ended design is arbitrarily designated as the negative side of the LNA 22. In this example, N-MOSFETs are used. The LNA 22 is constructed of a positive side cascode transistor 24 and a negative side cascode transistor 26, both of which are used to increase the isolation of their respective sides of the LNA 22; a positive side gain transistor 28 and a negative side gain transistor 30, both of which amplify the RF input signal of their respective sides; a center-tapped load inductor 32; and a center-tapped source inductor 34, which helps determine the input impedance of the LNA 22. During normal operation, the DC current level of the LNA 22 is set by applying a DC voltage, called Vbias2, to the gates of the cascode transistors 24, 26, and a DC voltage, called Vbias1, to the gates of the gain transistors 28, 30 through a second bias resistor R2 and a third bias resistor R3. The differential RF input signal to the LNA 22 is applied between the gates of the positive side gain transistor 28, and the negative side gain transistor 30. The RF output from the LNA 22 is taken from the drains of the positive side cascode transistor 24 and the negative side cascode transistor 26. Normally, the positive side gain transistor 28, and the negative side gain transistor 30 function in their saturated operating regions.
Several characteristics are desirable in a dual mode LNA. Since the matching circuitry connected to the input of an LNA is often a fixed impedance, it is desirable for the input impedance of the dual mode LNA to remain constant when switching between the two modes of operation. It is desirable for both modes of an LNA to function over the same operating frequency, which is a function of the LNA's bandwidth. Also, it is desirable for the average current consumption of an LNA to be as small as possible.
There are several conventional methods for implementing a low-gain mode; however, each of them has shortcomings. One method is to reduce the DC operating current level of the LNA by reducing Vbias1. This method has the benefit of reducing LNA gain and current consumption in low-gain mode; however, the LNA's cut-off frequency and the real part of the LNA's input impedance are also reduced, therefore, the input impedance is different for each mode of operation. A second method is to use some type of low-gain circuit such as a MOS bypass switch between input and output. This method does have the advantage of reduced average current consumption in bypass mode; however, such circuits have gain loss through the switch when they are in bypass mode, and when the mode is switched, the input impedance is changed and the phase of the RF signal is changed abruptly. A third method is to use a steering current circuit to divert current from the gain transistor(s). This method does allow for precise control of LNA gain in low-gain mode and has constant input impedance at normal and low-gain modes; however, average current consumption remains unchanged in low-gain mode.